GSoC Project Report: Continuous Integration for Hardware Projects on LibreCores CI
Librecores provides a platform to share projects and ideas, in the area of free and open-source digital hardware design. Librecores CI is a service to provide CI for hardware projects hosted on Librecores to improve user experience and reliability.
This summer, I worked on developing continuous integration pipeline for hardware projects such as OpenRISC, a family of free and open-source processor implementations on the RISC architecture
I worked from May to August 2019. In this project I worked on contrasting technologies (EDA tools, processors, Docker, Jenkins, Groovy DSL & Jenkins Shared Pipeline library) and GitHub organizations (OpenRISC, LibreCores, FuseSoC) with the following goals:
Enhance OpenRISC CI pipelines and modify them to use standard LibreCores images
Enhance CI Pipelines with new test automation
Develop a Yosys synthesis metrics parser and add it to the LibreCores CI base image
Add Yosys Synthesis resource usage statistics parsing and publishing on Jenkins
Export OpenRISC test results to TAP and publish on Jenkins
Move shared code of OpenRISC Pipelines to LibreCores Pipeline Library
Add TAP and Yosys code parsing & publishing steps to LibreCores Pipeline library
Implement Default Pipeline for FuseSoC-based OpenRISC projects
Community Bonding: Planning the solution
During the community bonding period, we planned the goals of the project and its timeline. My mentors guided me on the existing CI pipelines and solutions to proceed with the project.
The coding phase was of 3 months, during which I implemented the ideas I proposed in my GSoC proposal.
In the first month, I worked on enhancing OpenRISC CI pipelines as it previously worked on Travis CI. The OpenRISC Continuous Integration (CI) suite is now running in a librecores-ci-openrisc docker container.
In the second phase, we started working on enhancing CI pipelines. We completed work on Yosys synthesis with changes in core description file of mor1kx (FuseSoC). This goal led to developments and changes in FuseSoC backend
edalize with its newly released version
Blog: Coding Phase 2 with Librecores CI, OpenRISC, Fusesoc & Jenkins
Presentation: GSoC/Outreachy 2019: Mid-term project demos, part 2
Demo Video: GSoC/Outreachy 2019: Mid-term project demos, part 2
In the third month, we completed Yosys Synthesis and published its result LibreCoresCI Jenkins server with plot plugin which also led to the release of new version 0.5.0 of Librecores CI base docker image.
I also worked on exporting OpenRISC test results to TAP Format and published on Jenkins with TAP plugin.
Finally, I worked on improving LibreCores Pipeline library for adding a generic pipelines for CI of the OpenRISC project. I also worked on generalising Yosys Synthesis so that it can be configured for various hardware projects with a simple declarative call.
Here is my Project Dashboard which has all my contributions to the project.
What tasks were accomplished
|Enhance CI Pipelines||Yes||Yes|
|OpenRISC CI pipelines In Jenkins||Yes||Yes|
|Docker Image for OpenRISC||Yes||Yes|
|Yosys Metrics Parser||Yes||Yes|
|Export Tests to TAP||Yes||Yes|
|Publish results with plugins||Yes||Yes|
|Openrisc Pipeline Library||Yes||Yes|
|Yosys Synthesis Pipeline Library||Yes||Yes|
|Fusesoc Pipeline Library||Yes||Yes|
|Open OCD / GDB||Yes||No|
What did I learn in GSoC
Various technologies i.e Docker, Jenkins
Groovy Programming and developing Jenkins Shared Library
Concepts of DSL and Closure
Various EDA Tools
We would like to invite more hardware projects to use the LibreCores Pipeline library and development tools. If you are interested to do so, please reach out to us in the LibreCores CI Gitter Chat.
Thank you Oleg Nenashev, Stafford Horne, Olofk Kindgren for helping me complete the goals for GSoC 2019.
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